Ch11 Topic 05 - VGA Control Law
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Purpose
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Separate the desired gain-versus-control characteristic from the transistor implementation using a transparent behavioural model.

Open in RFspice
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1. Open ACDSPICE_Ch11_T05_VGA_Control_Law.rfspice.json.
2. Run the analyses already entered in the Analysis box.
3. Plot the nodes/currents named in expected_results.txt.
4. Compare the result with the hand calculation before changing values.

Files
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- ACDSPICE_Ch11_T05_VGA_Control_Law.rfspice.json: native RFspice schematic/project JSON.
- ACDSPICE_Ch11_T05_VGA_Control_Law.cir: corresponding plain SPICE netlist.
- expected_results.txt: expected numerical checks and trends.
- models/ACDSPICE_analog_models.lib: local educational device library.

Model note
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These are representative teaching models. Use the selected manufacturer's current datasheet and production SPICE model when correlating a final hardware design.
